Increased circuit density is an ongoing goal of manufacturers of semiconductor devices. One long-favored configuration is an assembly of vertically stacked semiconductor dice, at least some of which are interconnected electrically and the stacked die assembly being mechanically and electrically connected to higher level packaging, such as a substrate bearing conductive traces.
One configuration employing a plurality of stacked semiconductor dice is a Micropillar Grid Array Package (“MPGA”). Such a package comprises a stack of a plurality (for example four (4)) of dynamic random access (DRAM) semiconductor memory dice vertically interconnected from an uppermost die to a lowermost die, and a plurality of electrically conductive pillars extending from the underside of the lowermost memory die for connection to a logic die, such as, by way of nonlimiting example, a System on a Chip (SoC) die.
The provider of the logic die or the SoC die conventionally mounts their device to an interposer, such as a ball grid array (BGA) substrate, the logic or SoC die including conductive through vias for connection to the conductive pillars on the underside of the MPGA. The MPGA is mounted to the logic die or SoC die on the interposer and the assembly is then overmolded with an encapsulant into a finished Ball Grid Array (BGA) package.
The aforementioned configuration enables fast memory access, and reduces power requirements.
One particularly promising implementation of an MPGA is a so-called “Hybrid Memory Cube” (HMC), a die assembly which incorporates a high-speed logic die below a vertical stack of DRAM dice interconnected with through-silicon vias (TSVs). The DRAM dice are configured specifically to only handle data, while the logic die provides all DRAM control within the HMC. The design is expected to reduce latency, and greatly improve bandwidth and speed, while offering significantly reduced power demand and physical space requirements and providing flexibility for multiple platforms and application through use of different logic dice.
End products of the above designs will find a wide variety of applications including, among others, in mobile electronic devices such as so-called “smart phones,” laptop and notebook computers, supercomputers, BLACKBERRY® devices, iPHONE® and iPAD® devices, and DROID® devices.
One significant focus with regard to implementation of the above-referenced designs is effective thermal management of a substantial amount of heat generated during operation by a logic or SoC die at the base of the die assembly so that the maximum operational temperature of each die within the package, commonly referred to as Tmax does not exceed acceptable limits.